Phinge™ is seeking talented, creative, energetic people with the desire to join our team, and be a part of the biggest innovations in technology in the last 20 years. Phinge is creating a platform consisting of unique cutting edge mobile hardware, software and applications to forever change the way the world works, plays, interacts and benefits from their experiences.
Due to the sensitive nature of what we are creating, all applicants must sign a Non-Disclosure Agreement (NDA) prior to interviewing with Phinge™.
What we can say is that Phinge™ is a technology company like no other and we believe our team members are a valued and intricate part of our mission and our future. We hope you will join us as we transform technology by rewarding and enhancing the experience of our users, consumers, merchants and small businesses each and every day.
If you are talented, energetic and would like to create something disruptive and transforming, then we are excited to hear from you.
To learn more about this phantastic opportunity, you may read about the exciting future of technology on our website at phinge.com.
Design Integration Engineer
Phinge™ is developing a first of its kind software platform including an OS, cloud solution and consumer, business and social media applications. This will complement our state of the art mobile phones, tablets hybrids and peripherals. Due to the sensitive nature of the products and company we are building, information and the description of this job will be made available after submission and acceptance of applicants resume, other pertinent personal information and upon signing a non-disclosure agreement. If you would like to be part of the biggest revolution in technology in the last 20 years, we would love to hear from you. Location
West Coast: Due to extreme confidentiality purposes, the location of this position will be disclosed after an NDA is signed.
United States (Required)
This position requires thorough knowledge of the ASIC design flow, FE and Design verification, synthesis, scripting and netlist generation. The ideal candidate will have the following background:
Proven track record of high-performance designs in high volume production for low power applications
Consistent record of RTL design and timing closure on large complex designs
Expertise in SOC IP integration and RTL Design for performance, low area, and low power FE production synthesis with DFT insertion